Special Reports

EDA’s Top Execs Map Out An AI-Driven Future

By: Ed Sperling

AI is accelerating the need for 3D-ICs and digital twins, and causing lots of disruption along the way.
The Best DRAMs For Artificial Intelligence

By: Bryon Moyer

The choice of DRAM depends on where the action is.
Rethinking Chip Reliability For Harsh Conditions

By: Gregory Haley

Shift right, then left is becoming more common for test and inspection in mission- and safety-critical applications.

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Top Stories

Mixed Messages Complicate Mixed-Signal

Analog and mixed signal content is adding risk to ASIC designs. Pessimists see the prob...

Distributing Intelligence Inside Multi-Die Assemblies

Disaggregration requires traffic cops and in-chip monitors to function as expected over...

Security Vulnerabilities Difficult To Detect In Verification Flow

New tools and techniques are being developed and can help keep the verification process...

Disruptive Changes Ahead For Photomasks?

Evolving lithography demands are challenging mask writing technology, and the shift to ...

Power Delivery Challenges For AI Chips

Rising power densities and new architectures are forcing a rethinking of interconnects,...

Physics Limits Interposer Line Lengths

Thin lines and limited ground planes keep RDL interconnects short.

Are Larger Reticle Sizes On The Horizon?

The stitching process for 1nm litho faces yield challenges with high-NA EUV.

Can You Build A Known-Good Multi-Die System?

Executive Outlook: Just because the various components in an advanced package work indi...

Photomask Changes And Challenges At Mature And Advanced Nodes

Evolving lithography demands are challenging mask writing technology, and the shift to ...

RISC-V’s Increasing Influence

Does the world need another CPU architecture when that no longer reflects the typical w...

Multi-Die Assemblies Complicate Parasitic Extraction

What used to be an afterthought is now a first-order concern for performance and power ...

Challenges In Using Sub-7nm ICs In Automotive

Targeted design for test, better fault models, and in-system testing must keep pace wit...

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Latest News

Chip Industry Week in Review

DAC's AI focus; 300mm fab report; foundry revenue; new auto chip org.; Micron earnings; rare earth exports plummet; UK's tech push; power demand explodes; vertica...

Blog Review: June 25

3D-IC trends and challenges; virtual prototypes for SDVs; chiplet security; sustainable AI development; quality best practices.

more news »



Opinion

Iteration And Hallucination

For many aspects of an EDA flow, hallucinations from AI are no...

TSMC: King Of Data Center AI

Opinion: The foundry makes all of the logic chips critical for...

more opinions »



Research

Research Bits: June 24

Image sensors: In-sensor visual processing; better colors with...

Chip Industry Technical Paper Roundup: June 24

Wafer-scale AI accelerators vs. single chip GPUs; machine inte...

Chip Industry Technical Paper Roundup: June 17

HBM roadmap from KAIST; RISC-V base station-on-chip; fully aut...

more research »



Startup Corner

Baya Systems: Moving Data Faster

Taking aim at AI bottlenecks based on NoC technology developed...

Startup Funding: Q1 2025

AI chips and data center communications see big funding; 75 st...

more startups »

Videos

LLMs On The Edge


Agentic AI In Chip Design


Big Changes In Medical Electronics


Optical Interconnectivity At 224 Gbps


Knowledge Centers / Entities, people and technologies explored

OSZAR »